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high precision hall effect latch for consumer applications hall effect latch TLV4968-1T TLV4968-1Ta TLV4968-1Tb TLV4968-1T sense & control data sheet revision 1.0, 2015-05-18
data sheet 2 revision 1.0, 2015-05-18 TLV4968-1T 1 product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 target applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 pin configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.5 functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.6 default start-up behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.4 electrical and magnetic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 to92s-3-2 distance between chip and package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table of contents
TLV4968-1T data sheet 3 revision 1.0, 2015-05-18 table 1 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3 absolute maximum rating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 4 esd protection ( t a = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 5 operating conditions parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 6 general electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 7 magnetic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 list of tables
TLV4968-1T data sheet 4 revision 1.0, 2015-05-18 figure 1 image of TLV4968-1T to92s-3-1 to92s-3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2 pin configuration and center of sensitive area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3 functional block diagram TLV4968-1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4 TLV4968-1T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5 output signal TLV4968-1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 6 illustration of the start-up behavior of the TLV4968-1T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7 basic application circuit #1: only pull-up resistor is necessary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8 enhanced application circuit #2 for extended esd robustne ss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 9 definition of magnetic field direction to92s-3-2, to92s-3 -1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10 package outline TLV4968-1Ta: to92s-3 -1 (all dimensions in mm). . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11 package outline TLV4968-1Tb: to92s-3 -2 (all dimensions in mm). . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12 packing of the TLV4968-1Tb to92s-3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13 distance between chip and package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14 marking of TLV4968-1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 list of figures
data sheet 5 revision 1.0, 2015-05-18 TLV4968-1T product description 1 product description 1) 1.1 overview figure 1 image of TLV4968-1T to92s-3-1 to92s-3-2 1.2 features ? 3.0 v to 26 v operating supply voltage ? operation from unregulated power supply ? output overcurrent & ov ertemperature protection ? active error compensation ? high stability of magnetic thresholds ? high esd performance ? leaded, halogen-free package to92s-3-1 for TLV4968-1Ta, to92s-3-2 for TLV4968-1Tb 1.3 target applications target applications for the tlv496x hall switch family are all applications which re quire a high precision hall latch with an operating temperature range from -40 c to 125 c. the magnetic behavior as a latch and switching thresholds of typical 1 mt make the device especially suited for the use with a pole wheel for inde x counting applications, for rotor po sition detection as in brushless dc motor commutation and for white g oods or open/closing detection. for automotive applications please refer to the infineon tle hall switches series. 1) only the package is halogen-free. characteristic supply voltage supply current sensitivity interface temperature t a bipolar hall effect latch 3.0~26 v 1.6 ma b op :1mt b rp :-1mt open drain output -40 c to 125 c table 1 ordering information product name product type ordering code package TLV4968-1Ta hall latch sp001274788 to92s-3-1 (bulk) TLV4968-1Tb hall latch sp001283508 to92s-3-2 (ammo pack)
data sheet 6 revision 1.0, 2015-05-18 TLV4968-1T functional description 2 functional description 2.1 general the TLV4968-1T is an integrated hall effect designed specifically for highly accurate applications with superior supply voltage capability, and temp erature stability of the magnetic thresholds. 2.2 pin configuration (top view) figure 2 pin configuration and center of sensitive area 2.3 pin description table 2 pin description pin no. symbol function 1 vdd supply voltage 2gnd gnd 3q output 1 v dd 2 gnd 3 q
data sheet 7 revision 1.0, 2015-05-18 TLV4968-1T functional description 2.4 block diagram figure 3 functional block diagram TLV4968-1T 2.5 functional block description the chopped hall ic switch comprises a hall probe, bi as generator, compensation circuits, oscillator and output transistor. the bias generator provides currents for the hall probe and the active circui ts. compensation circuits stabilize the temperature behavior and reduce influence of technology variations. the active error compensation (chopp ing technique) rejects offsets in th e signal path and the influence of mechanical stress to the hall prob e caused by molding and soldering pr ocesses and other thermal stress in the package. the chopped measurement principle togeth er with the threshold ge nerator and the comparator ensures highly accurate and temper ature stable magnetic thresholds. the output transistor has an integrated overcurrent and overte mperature protection. voltage regulator bias and compensation circuits oscillator and sequencer to all subcircuits spinning hall probe chopper multiplexer amplifier demodulator low pass filter comparator with hysteresis control overtemperature & overcurrent protection gnd q v dd reference
data sheet 8 revision 1.0, 2015-05-18 TLV4968-1T functional description figure 4 TLV4968-1T figure 5 output signal TLV4968-1T applied magnetic field 90% 10% v q t f t d t r t d b op b rp v q b op b rp 0 b
data sheet 9 revision 1.0, 2015-05-18 TLV4968-1T functional description 2.6 default start-up behavior the magnetic thresholds exhibit a hysteresis b hys = b op - b rp in case of a power-on with a magnetic field b within hysteresis ( b op > b > b rp ) the output of the sensor is se t to the pull up voltage level ( v q ) per default. after the first crossing of b op or b rp of the magnetic field the internal de cision logic is set to the corresponding magnetic input value. v dda is the internal supply vo ltage which is following th e external supply voltage v dd . this means for b > b op the output is switching, for b < b rp and b op > b > b rp the output stays at v q . figure 6 illustration of the start-up behavior of the TLV4968-1T t 3v t t v q t b > b op b < b rp b op > b > b rp magnetic field above threshold magnetic field below threshold magnetic field in hysteresis power on ramp the device always applies v q level at start -up independent from the applied magnetic field ! v q v q v dda t pon
data sheet 10 revision 1.0, 2015-05-18 TLV4968-1T specification 3 specification 3.1 application circuit the following figure 7 shows the basic option of an applicat ion circuit. only a pull-up resistor r q is necessary. the resistor r q has to be in a dimension to match the applied v s to keep i q limited to the operating range of maximum 25 ma. e.g.: v s = 12 v; i q = 12 v/1200 ? = 10 ma figure 7 basic application ci rcuit #1: only pull-up resistor is necessary figure 8 enhanced application circuit #2 for extended esd robustness with an additional capacitor c dd and a transient voltage suppression (t vs) diode an extended esd robustness on system level is achieved ( figure 8 ). tlv496x gnd vs r q = 1.2k v dd q tlv496x gnd vs r q = 1. 2k c dd = 47nf v dd q tvs diode e. g. esd24vs2u
data sheet 11 revision 1.0, 2015-05-18 TLV4968-1T specification 3.2 absolute maximum ratings attention: stresses above the max. values listed here may cause permanent damage to the device. exposure to absolute maximum rating conditio ns for extended period s may affect device reliability. maximum ratings are absolute rati ngs; exceeding only one of these values may cause irreversible damage to the integrated circuit. calculation of the dissipated power p dis and junction temperature t j of the chip: e.g. for: v dd = 12 v, i s = 2.5 ma, v qsat = 0.5 v, i q = 20 ma power dissipation: p dis = 12 v x 2.5 ma + 0.5 v x 20 ma = 30 mw + 10 mw = 40 mw temperature ? t = r thja x p dis = 250 k/w x 40 mw = 10 k for t a = 50 c: t j = t a + ? t = 50 c + 10 k = 60 c table 3 absolute maximum rating parameters parameter symbol values unit note or test condition min. typ. max. supply voltage 1) 1) this lifetime statement is an anticipation based on an extr apolation of infineon?s qualific ation test results. the actual lifetime of a component depends on its form of applic ation and type of use etc. and may deviate from such statement. the lifetime statement shall in no event extend the agreed warranty period. v dd 3?26v? output voltage v q -0.5 ? 26 v ? reverse output current i q -70 ? ? ma ? junction temperature 1) t j -40 ? 150 c ? storage temperature t s -40 ? 150 c ? thermal resistance junction ambient r thja ? ? 250 k/w for to92s-3-2 (2s2p) table 4 esd protection 1) ( t a = 25 c) 1) characterization of esd is carried out on a sample basis, not subject to production test. parameter symbol values unit note or test condition min. typ. max. esd voltage (hbm) 2) 2) human body model (hbm ) tests according to ansi/esda/jedec js-001. v esd -4 ? 4 kv r =1.5k ? , c = 100 pf esd voltage (cdm) 3) 3) charge device model (cdm) te sts according to jesd22-c101. v esd -1 ? 1 kv ?
data sheet 12 revision 1.0, 2015-05-18 TLV4968-1T specification 3.3 operating range the following operating condit ions must not be exceeded in order to ensure correct operation of the tlv4968- 1t. all parameters specified in the follo wing sections refer to these oper ating conditions unless otherwise mentioned. 3.4 electrical and magnetic characteristics product characteristic s involve the spread of valu es guaranteed within the specified voltage and ambient temperature range. typical charac teristics are the median of the production and correspond to v dd = 12 v and t a = 25c. the below listed specification is valid in combination with the appl ication circuit shown in figure 7 and figure 8 table 5 operating conditions parameters parameter symbol values unit note or test condition min. typ. max. supply voltage v dd 3.0 ? 26 1) 1) latch-up test with factor 1.5 is no t covered. please se e max ratings also. v? output voltage v q 3.0 ? 26 v ? operation temperature t a -40 ? 125 c r thja 250k/w output current i q 0?25ma? table 6 general electrical characteristics parameter symbol values unit note or test condition min. typ. max. supply current i s 1.1 1.6 2.5 ma ? output current limitation i qlimit 30 56 70 ma internally limited & thermal shutdown output fall time 1) 1) not subject to production test, verified by design/characterization. t f 0.17 0.4 1 s 1.2 k ? / 50 pf, see figure 4 output rise time 1) t r 0.4 0.5 1 s 1.2 k ? / 50 pf, see figure 4 delay time 1)2) 2) systematic delay between magnetic th reshold reached and output switching. t d 12 15 30 s see figure 4 power-on time 1)3) 3) time from applying v dd = 3.0 v to the sensor un til the output is valid. t pon ? 80 150 s v dd =3v, b b rp -0.5mtor b b op +0.5mt
data sheet 13 revision 1.0, 2015-05-18 TLV4968-1T specification field direction definition positive magnetic fields are defined with the south pole of the magnet to the branded side of package. figure 9 definition of magnetic fi eld direction to92s-3-2, to92s-3-1 table 7 magnetic characteristics parameter symbol t (c) values unit note / test condition min. typ. max. operating point b op -40 -0.3 1.1 2.3 mt ? 25 -0.4 1.0 2.3 mt ? 125 -0.4 0.9 2.1 mt ? release point b rp -40 -2.3 -1.1 0.3 mt ? 25 -2.3 -1.0 0.4 mt ? 125 -2.1 -0.9 0.4 mt ? hysteresis b hys -40 1.2 2.1 3.1 mt ? 25 1.1 2.0 2.9 mt ? 125 1.0 1.8 2.7 mt ? temperature compensation of magnetic thresholds 1) 1) not subject to production test, verified by design/characterization. t c ? ? -1000 ? ppm/k ? n s branded side n s
data sheet 14 revision 1.0, 2015-05-18 TLV4968-1T package information 4 package information the TLV4968-1Ta is available in bu lk packing with to92s-3-1-package. the TLV4968-1Tb is available in a mmo packing with to92s-3-2-package. 4.1 package outline figure 10 package outline TLV4968-1Ta: to92s-3-1 (all dimensions in mm)
data sheet 15 revision 1.0, 2015-05-18 TLV4968-1T package information figure 11 package outline TLV4968-1Tb: to92s-3-2 (all dimensions in mm)
data sheet 16 revision 1.0, 2015-05-18 TLV4968-1T package information 4.2 packing information figure 12 packing of the TLV4968-1Tb to92s-3-2 4.3 to92s-3-2 distance between chip and package figure 13 distance between chip and package
data sheet 17 revision 1.0, 2015-05-18 TLV4968-1T package information 4.4 package marking figure 14 marking of TLV4968-1T halogen free (h) year ( y) = 0 ...9 calendar week (ww) = 01 ...52 lot code (ll ) v681t hywwll
data sheet 18 revision 1.0, 2015-05-18 TLV4968-1T revision history 5 revision history revision date changes 1.0 2015-05-18 initial release.
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